After some more research, I believe I've stumbled across the real answer: The VIC-II and SID used a larger process node size because Commodore's fabrication line circa 1981 was uniquely positioned produce chips at that size at effectively no production cost whatsoever.

Based on what I've read, here's my best guess at what Commodore's fabrication situation looked like in the months when the VIC-II and SID were being designed:

In 1981, Commodore had two fabrication lines: the older NMOS line which could handle no smaller than 5 µm, and the newer HMOS line then capable of 3.5 µm. For the new line, Commodore's priority was updating their CPUs because they stood to benefit the most from smaller process nodes. This is shown by the first products they released from the new line: MOS 7501 and MOS 8501, both die shrunk upgrades of the 6510. Additionally, they recognized their process was lagging the rest of the world, so they wanted to shrink to 2 µm in a bid to catch up. This is shown by the MOS 8501, released around the same time as MOS 7501, but successfully using 2 µm technology. The end result was the HMOS line was occupied with these two high priority challenges at least until 1984 when the MOS 7501/8501 were ready.

While this was happening, the older NMOS line was no longer operating at full capacity because the HMOS line was taking over some of the responsibility for CPU fabrication, especially the new R&D fabrication. But chip fabs don't simply turn off if you aren't using them: it costs money and manpower to keep the facilities running even during the slower periods.

This is where the new chips come in. From the very source I cited when asking the question,

Because MOS Technology's fabrication facility was not running at full capacity, the equipment used for C64 test chips and multiple passes of silicon would otherwise have been idle. "We were using people who were there anyway," said Ziembicki. "You waste a little bit of silicon, but silicon's pretty cheap. It's only sand."

In other words, there was a huge design and debugging benefit from using the older line because they could build and debug test chips almost whenever they wanted and there was no cost to doing so.

With this, Winterble explained, a circuit buried deep inside the chips could be lifted out and run as a test chip, allowing thorough debugging without concern for other parts of the circuitry.

Of course, when mass production began, the production would cost something because it wouldn't be absorbed in overhead anymore. But that still offered a significant cost advantage in production yield.

Not only the development costs absorbed into company overhead, but there was no mark-up to pay, as there would have been if the chips had been build by another company. And yields were high because the chips were designed for a mature semiconductor-manufacturing process.

Yield seemed to have been a significant cost concern when designing the chips from the very beginning.

"We defined in advance the silicon size that would give a yield we were willing to live with..." - Charles Winterble

This is especially true when considering the overall design goals of the machine.

"When the design of the Commodore 64 began, the overriding goals were simplicity and low cost. The initial production cost of the Commodore 64 was targeted at $130; it turned out to be $135." - Al Charpentier

This is enough to construct a comparison of what the two process sizes would offer the VIC-II and the SID:

Pros of the newer, 3.5 µm process:

- More chip area, meaning more features for the chips and fewer design compromises.

Pros of the older, 5 µm process:


- Higher production yield, meaning lower production cost overall
- Zero cost test chips
- Does not impact the high priority projects of updating the CPU line and improving the new fab process.
- Adequate chip area: Video and sound chips are expected to benefit less (in terms of business value) from smaller process nodes compared to a CPU.
- Better match for one of the key overridng design goals: Low cost.

Given all this, of course they went with the older 5 µm process. It's almost hard to think why the newer fab would even have been considered to begin with.